Generic image
MC10EP35DR2G
- Part No
- MC10EP35DR2G
- Manufacturer
- onsemi
- Description
- Lead Free Not Qualified Reset JK Type Flip Flop -40C~85C TA -50mA -3V~-5.5V 0.575ns
- Datasheet
- MC10EP35DR2G
- Test Report
- Available
- Samples
- Available
Request for Quote
- Availability:
- Available
Product Specification
| Specification | Value |
|---|---|
| Clock Edge Trigger Type | Positive Edge |
| Frequency | 3 GHz |
| High Level Output Current | -50 mA |
| Logic Function | Flip-Flop, JK-Type |
| Low Level Output Current | 50 mA |
| Max Operating Temperature | 85 °C |
| Max Supply Current | 50 mA |
| Max Supply Voltage | 5.5 V |
| Min Operating Temperature | -40 °C |
| Min Supply Voltage | 3 V |
| Number of Bits | 2 |
| Number of Bits per Element | 1 |
| Number of Circuits | 1 |
| Number of Elements | 1 |
| Number of Input Lines | 1 |
| Number of Output Lines | 1 |
| Operating Supply Voltage | 3.3 V |
| Polarity | Non-Inverting |
| Propagation Delay | 490 ps |
| Turn-On Delay Time | 410 ps |
| Case/Package | SOIC |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Number of Pins | 8 |
| Number of Terminals | 8 |
| Height - Seated (Max) | 1.75 mm |
| Length | 4.9 mm |
| Terminal Pitch | 1.27 mm |
| Width | 3.9 mm |
added to cart
View cart