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SN74LS112AN
- Part No
- SN74LS112AN
- Manufacturer
- Texas Instruments
- Description
- Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
- Test Report
- Available
- Samples
- Available
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- Availability:
- Available
Product Specification
| Specification | Value |
|---|---|
| Clock Edge Trigger Type | Negative Edge |
| Frequency | 30 MHz |
| High Level Output Current | -400 µA |
| Logic Function | AND, Flip-Flop, JK-Type |
| Low Level Output Current | 8 mA |
| Max Frequency | 45 MHz |
| Max Operating Temperature | 70 °C |
| Max Supply Voltage | 5.25 V |
| Min Operating Temperature | 0 °C |
| Min Supply Voltage | 4.75 V |
| Nominal Supply Current | 100 µA |
| Number of Bits | 2 |
| Number of Bits per Element | 1 |
| Number of Channels | 2 |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Number of Input Lines | 5 |
| Number of Output Lines | 2 |
| Operating Supply Current | 100 µA |
| Operating Supply Voltage | 5 V |
| Output Current | 8 mA |
| Output Type | TTL |
| Polarity | Non-Inverting |
| Propagation Delay | 20 ns |
| Schedule B | 8542390000, 8542390000|8542390000|8542390000|8542390000|8542390000 |
| Turn-On Delay Time | 15 ns |
| Case/Package | PDIP |
| Mount | Through Hole |
| Number of Pins | 16 |
| Weight | 951.693491 mg |
| Height | 5.08 mm |
| Length | 19.3 mm |
| Thickness | 3.9 mm |
| Width | 6.35 mm |
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