MACH111SP-5JC Generic image

MACH111SP-5JC

Part No
MACH111SP-5JC
Manufacturer
Lattice Semiconductor
Description
CPLD MACH 1 Family 1.25K Gates 32 Macro Cells 182MHz EECMOS Technology 5V 44-Pin PLCC
Datasheet
MACH111SP-5JC
Test Report
Available
Samples
Available

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    Availability:
    Available

    Product Specification

    Specification Value
    Clock Rate 133 MHz, 143 MHz
    Max Operating Temperature 70 °C
    Max Supply Voltage 5.25 V
    Min Operating Temperature 0 °C
    Min Supply Voltage 4.75 V
    Number of Gates 1250
    Number of I/Os 32
    Number of Macrocells 32
    Operating Supply Voltage 5 V
    Propagation Delay 5 ns
    Case/Package PLCC
    Number of Terminals 44
    Height - Seated (Max) 4.57 mm
    Length 16.5862 mm
    Terminal Pitch 1.27 mm
    Width 16.5862 mm
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