CD74HC107M96 Generic image

CD74HC107M96

Part No
CD74HC107M96
Manufacturer
Texas Instruments
Description
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with eset 14-SOIC -55 to 125
Test Report
Available
Samples
Available

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    Product Specification

    Specification Value
    Clock Edge Trigger Type Negative Edge
    Frequency 60 MHz
    High Level Output Current -5.2 mA
    Logic Function Flip-Flop, JK-Type
    Low Level Output Current 5.2 mA
    Max Operating Temperature 125 °C
    Max Supply Voltage 6 V
    Min Operating Temperature -55 °C
    Min Supply Voltage 2 V
    Number of Bits 2
    Number of Bits per Element 1
    Number of Circuits 2
    Number of Elements 2
    Number of Input Lines 2
    Number of Output Lines 1
    Output Current 5.2 mA
    Packaging Cut Tape (CT)
    Polarity Non-Inverting
    Propagation Delay 170 ns
    Quiescent Current 4 µA
    Schedule B 8542390000, 8542390000|8542390000|8542390000|8542390000|8542390000
    Turn-On Delay Time 14 ns
    Case/Package SOIC
    Contact Plating Gold
    Mount Surface Mount
    Number of Pins 14
    Weight 129.387224 mg
    Height 0 m
    Length 8.65 mm
    Thickness 1.58 mm
    Width 3.91 mm
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